Using media processors for low-memory AES implementation

Daniel Page, James P J Irwin

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

11 Citations (Scopus)

Abstract

Most performance studies of AES make traditional space versus time trade-offs by allowing large look-up tables to accelerate operations that would normally be calculated by the processor. However, AES is a versatile algorithm and can also be optimised for low-memory use in constrained environments. In this paper we investigate the possibility of getting the best of both worlds -- an application specific hardware and software solution that has a low dependency on memory yet still executes fast enough to consider for use in production systems. The resulting software is attractive in high level design since it allows AES to be more easily deployed as a composable element in larger systems and scale better as processor speed increases.
Translated title of the contributionUsing Media Processors for Low-Memory AES Implementation
Original languageEnglish
Title of host publicationApplication-specific Systems, Architectures and Processors - ASAP 2003
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages144--154
Publication statusPublished - 2003

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    Page, D., & Irwin, J. P. J. (2003). Using media processors for low-memory AES implementation. In Application-specific Systems, Architectures and Processors - ASAP 2003 (pp. 144--154). Institute of Electrical and Electronics Engineers (IEEE).