Using the Graphcore IPU for Traditional HPC Applications

Thorben R Louw, Simon N McIntosh-Smith

Research output: Contribution to conferenceConference Paperpeer-review


The increase in machine learning workloads means that AI accelerators are expected to become common in super- computers, evoking considerable interest in the scientific high- performance computing (HPC) community about how these devices might also be exploited for traditional HPC workloads. In this paper, we report our early results using the Graph- core Intelligence Processing Unit (IPU) for stencil computations on structured grid problems, which are used for solvers for differential equations in domains such as computational fluid dynamics. We characterise the IPU’s performance by presenting both STREAM memory bandwidth benchmark results and a Roofline performance model. Using two example applications (the Gaussian Blur filter and a 2D Lattice Boltzmann fluid simulation), we discuss the challenges encountered during this first known IPU implementation of structured grid stencils. We demonstrate that the IPU and its low-level programming framework, Poplar, expose sufficient programmability to express these HPC problems, and achieve performance comparable to that of modern GPUs.
Original languageEnglish
Publication statusAccepted/In press - 15 Dec 2020
Event3rd Workshop on Accelerated Machine Learning: Co-located with the HiPEAC 2021 Conference -
Duration: 18 Jan 202118 Jan 2021
Conference number: 3


Workshop3rd Workshop on Accelerated Machine Learning
Abbreviated titleAccML
Internet address


  • Structured grid
  • Stencil
  • Accelerators


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