Verilog-A Based Effective Complementary Resistive Switch Model for Simulations and Analysis

Research output: Contribution to journal › Article (Academic Journal) › peer-review

24 Citations (Scopus)

Original language	English
Journal	IEEE Embedded Systems Letters
Volume	6
Issue number	1
Publication status	Published - 2014

Handle.net

@article{f28d151360d44e7880ce127bff31d424,

title = "Verilog-A Based Effective Complementary Resistive Switch Model for Simulations and Analysis",

author = "Yuanfan Yang and Jimson Mathew and Shafik, \{Rishad A\} and Pradhan, \{Dhiraj K\}",

year = "2014",

language = "English",

volume = "6",

journal = "IEEE Embedded Systems Letters",

issn = "1943-0663",

publisher = "Institute of Electrical and Electronics Engineers (IEEE)",

number = "1",

}