VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2m) Using Dual Bases

Hafizur Rahaman, Jimson Mathew, Jabir A. M., Dhiraj K Pradhan

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

1 Citation (Scopus)
Original languageEnglish
Title of host publicationLecture note in Computer Science
PublisherSpringer Verlag
Pages258-269
Publication statusPublished - Jul 2012

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