Wafer-scale GaN HEMT performance enhancement by diamond substrate integration

G. D. Via*, J. G. Felbinger, J. Blevins, K. Chabak, G. Jessen, J. Gillespie, R. Fitch, A. Crespo, K. Sutherlin, B. Poling, S. Tetlak, R. Gilbert, T. Cooper, R. Baranyai, J. W. Pomeroy, M. Kuball, J. J. Maurer, A. Bar-Cohen

*Corresponding author for this work

Research output: Contribution to journalArticle (Academic Journal)peer-review

20 Citations (Scopus)


A wafer-scale comparison of HEMTs fabricated on as-grown GaN/Si and HEMTs fabricated in parallel on epitaxial layers from the GaN/Si growth integrated with a diamond substrate are presented. Diamond, which offers the highest room-temperature thermal conductivity of any bulk material, is being evaluated as a solution for thermal limitations observed in GaN-based devices. This paper will present electrical and thermal data collected at the wafer scale demonstrating the improvement realized by integration of a high-thermal-conductivity substrate.

Original languageEnglish
Pages (from-to)871-874
Number of pages4
Journalphysica status solidi (c)
Issue number3-4
Publication statusPublished - 2014

Structured keywords

  • CDTR


  • Diamond substrate integration
  • GaN/diamond
  • Thermal resistance


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