When does Network-on-Chip Bypassing Make Sense?

SJ Hollis, Chris R Jackson

Research output: Chapter in Book/Report/Conference proceedingConference Contribution (Conference Proceeding)

10 Citations (Scopus)

Abstract

Networks-on-Chip (NoCs) are becoming widespread in contemporary multi-core and many-core designs. Amongst their appeals are regularity of layout and flexibility of topology. However, the energy consumed by routing nodes is now vastly more than that of an ALU operation in one of the processing cores they service. We present an evaluation of bypassing, a technique where selected traffic can avoid the full routing functionality of selected nodes in a NoC. When implemented correctly, bypassing can dramatically reduce the overall energy consumption of data flowing through the network. We address the questions of when bypassing should be deployed at a given node, how much energy will be saved by doing so, and present some equations to quantify and answer these questions. We show that if 74-80% of data, depending on router implementation, is destined for a node further away than that employing bypassing, then bypassing is energy-effective. Using these figures, we define guidelines for the use of bypassing for a wide variety of NoC designs.
Translated title of the contributionWhen does Network-on-Chip Bypassing Make Sense?
Original languageEnglish
Title of host publication22nd IEEE SoCC Conference
DOIs
Publication statusPublished - Sept 2009

Bibliographical note

Conference Proceedings/Title of Journal: Proc. 22nd IEEE SoCC Conference
Conference Organiser: IEEE

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