Abstract
With GaN power devices being able to switch at rates in excess of 100 V/ns, this rapid change inevitably drives high ๐๐โ๐๐ก, which induces voltages over the various sections of the parasitic loop inductance in a power loop, triggering ringing, which is a source of unwanted electromagnetic interference (EMI)โmaking adaptation and integration of GaN switching devices challenging. This thesis explores the possibility of deliberately increasing loop inductance to cause a partial reduction of switching loss and the use of an active gate driver to alleviate parasitic oscillations induced by the rapid changing turn-on current. In this work, a simulation model of an active gate driver is developed for the dynamic transient shaping of a hard-switched GaN bridge leg circuit. This work provides a strategy to use an Evolutionary Multi-objective Optimization (EMO) algorithm to discover gate drive patterns across Pareto-optimal solution space using a multi-objective Nondominated Sorting Genetic Algorithm (NSGA-II). Three key measurable indicators are used to give each gate pattern a performance metric. These include: GaN device drain current overshoot, energy loss, and current ringing spectral analysis with Fast Fourier Transform (FFT). Both ideal and additional parasitic inductance circuit configurations are compared with a discreet gate pull-up resistor and active gate drive controller. Subsequent use of inequality constraints allows to refine search space bycircumscribing the optimization region, resulting in a faster convergence towards higher impact switching optimization strategies. The achieved results reveal that the active gate driver controlled by an NSGA-II is capable of finding unique gate drive patterns, improving current overshoot, switching losses, and compensating for additional parasitic loop inductance by reducing drain current ringing.
Date of Award | 29 Sept 2022 |
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Original language | English |
Awarding Institution |
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Supervisor | Bernard H Stark (Supervisor) & Saeed Jahdi (Supervisor) |