Broadband and Highly Efficient Radio Frequency Power Amplifiers Targeting Base Station Applications for 5G and Beyond

Student thesis: Doctoral ThesisDoctor of Philosophy (PhD)


The energy consumption of modern mobile networks is coming into more focus, with the need
to meet net zero and reduce network energy costs, where the power amplifier can be a major
consumption contributor. Mobile networks are also expanding in the spectrum used, requiring
an increased investment in infrastructure to cover this spectrum. This thesis therefore focuses
on the design and implementation of novel techniques for both high efficiency and bandwidth
performance in radio frequency power amplifiers, in an effort to alleviate both energy concerns
and future infrastructure investment costs.
The first main topic is based around Continuous Modes, where Class J and Continuous
Inverse Class F are examined using a real transistor device. It is proposed that a combination of
these two modes can be used to achieve high mean efficiency across the bandwidth of a power
amplifier, mitigating any loss of performance due to the knee voltage effect in a real device.
This combination of modes is used in the design and fabrication of a wideband and dual-band
power amplifier, where a high mean drain efficiency greater than 73 % is achieved in both.
When comparing with state of the art, this combination of modes for both power amplifiers is
Detailed in this thesis is a design methodology for an asymmetrical Doherty Power Amplifier
which achieves a high average efficiency at back-off across its operating bandwidth. This design
implements some of the findings from the investigation into continuous mode Doherty power
amplifiers, including an optimum combination of 2nd and 3rd harmonic impedances, and also
the use of the drain supply as a design parameter. The design and manufacture of a prototype
Doherty power amplifier is then detailed, which operates between 2.1 to 3.2 GHz with a power
of between 43.9 and 44.5 dBm, and a high mean drain efficiency of 64.7 % at 8-9 dB of power
back-off across its frequency of operation.
Finally, the design of a Ka-Band Doherty Monolithic Microwave Integrated Circuit (MMIC)
is detailed using a novel compact post matching technique, where the traditional peaking
matching network is removed to reduce circuit size, with the aim of improving state-of-the-art
MMIC power density. Using this technique a full 2-stage MMIC layout is designed and electromagnetically simulated. The results of this simulation were detailed, where the simulated MMIC
achieves a peak power of 6 W, with a fractional bandwidth of 17.5 % operating between 26-
31 GHz, with a high power-added-efficiency of between 22-28 % being achieved at 8-9 dB back-off.
Date of Award18 Jun 2024
Original languageEnglish
Awarding Institution
  • University of Bristol
SupervisorMark A Beach (Supervisor), Kevin Morris (Supervisor) & Tommaso Cappello (Supervisor)


  • Power Amplifier
  • Radio Frequency

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