Abstract
The widespread adoption of 5th generation mobile networks (5G) has resulted in substantial advancements in the current digital world, encompassing high bandwidth, ultra-lowlatency, and extensive connectivity. However, these improvements have been accompanied
by a notable increase in energy consumption, leading to a challenge to achieving carbon neutrality. Extensive studies have indicated that the power amplifier (PA) accounts for up to 38% of
the energy within 5G systems [1]. Consequently, developing energy-efficient PAs has become a
critical aspect for the implementation of future wireless communication systems.
Modern communication standards like orthogonal frequency division multiplexing (OFDM)
employ non-constant envelope modulation to improve the spectrum efficiency, which is a large
back-off between average and peak output power. To achieve accurate signal reproduction
at both peaks and average power, conventional linear mode PAs sacrifice power efficiency.
The Digital power amplifier (DPA) introduces a new methodology and flexibility for highperformance PA design, which potentially achieves 100% efficiency. Sustainability has also been
introduced into the transmitter design. Future transceivers also need to meet the requirements
of software definability. Therefore, DPA is becoming important and attractive to academic and
industrial fields.
This thesis proposes a novel multi-bit DPA structure to improve power efficiency. The parallel transistors only operate at peak efficient regions, in deep saturation, or are entirely off. The
quantising OFDM waveforms give rise to significant linearity challenges. With an elaborate selection of the output power levels at different DPA "on-off" states based on the distribution of the
OFDM waveforms, the multi-bit DPA reaches higher linearity. To further improve the "on-off"
switching speed, a novel fast gate-switching circuit was developed. A comprehensive simulation
and sufficient measurements have been conducted to validate the feasibility and performance of
this innovative model. This thesis also explores the deep learning method to speed up the power
combiner designing process. Power combiner designing in the DPA is exceptionally challenging
due to the implementation of load modulation on each DPA "on-off" state. There are numerous
potential topologies to choose from manually. Deep learning models can automatically predict
potential structures by defining target design requirements. A trade-off between mismatching
and efficiency can be balanced by limiting proper response targets.
In conclusion, the proposed architecture for DPA achieves a remarkable 55% system efficiency for OFDM signals while maintaining linearity. The machine learning (ML)-based simulation and design methodologies employed in this study hold great potential for future PA design
endeavours.
Date of Award | 18 Jun 2024 |
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Original language | English |
Awarding Institution |
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Supervisor | Mark A Beach (Supervisor) & Kevin Morris (Supervisor) |
Keywords
- Power Amplifier
- Machine Learning
- Wireless Communication System