Abstract
Over the past few decades, there has been a substantial increase in network bandwidth, accompaniedby significant advancements in network technologies. As a result, there arose a demand for specialized
hardware capable of relieving network-related workloads from the CPU. In response, the Smart NIC, a
more intelligent network interface card, was introduced to alleviate the burden on server throughput.
The journey of my PhD work and thesis commenced with an exploration of both established and
emerging Smart NIC technologies. The overarching objective was to harness FPGA technology to design
and implement an innovative and universal Smart NIC architecture. This architecture was engineered to
efficiently offload CPU workloads in common usage scenarios, particularly within Cloud and Telecom
networks.
Given the adaptable nature of the NIC/Smart NIC, designed to seamlessly integrate with a range of
hardware and operating systems, I leveraged various Open Source standards to develop a comprehensive
FPGA-based Smart NIC solution. This solution encompassed both hardware and software components,
contributing to the acceleration of intra- and inter-server networking.
The focus of my PhD thesis was directed towards the design and implementation of the FPGA-based
components. I chose P4 as the foundational architecture, providing the necessary programmability and
flexibility to meet our objectives. Multiple algorithms were devised to enhance throughput and reduce
latency, with a particular emphasis on two scenarios: intra-server Open Virtual Switch offloading and
inter-server Segment Routing.
To validate the effectiveness of our approach, a series of experiments were conducted, utilizing intraand inter-server use cases. The results of these experiments served as compelling evidence, showcasing
the substantial improvements achieved through the deployment of Smart NIC technology. This
encompassed enhancements in both intra-server and inter-server throughput and reductions in latency,
underscoring the significant impact of Smart NICs in optimizing network performance.
| Date of Award | 18 Jun 2024 |
|---|---|
| Original language | English |
| Awarding Institution |
|
| Supervisor | Reza Nejabati (Supervisor) & Dimitra Simeonidou (Supervisor) |