AbstractDevice life-time and performance is directly linked to its operating temperature, which necessitates accurate temperature measurements. However, reliable temperature measurement at the device level is challenging due to small device dimensions which are on the order of micrometres. Considering that the trend is toward the miniaturisation of electronic devices, from the micro-scale to the nano-scale, temperature measurements become even more challenging. The available techniques have limitations in terms of either resolution, calibration, acquisition time or equipment cost. This thesis provides an alternative solution to address these challenges by developing a new thermography technique called hyperspectral quantum rod thermal imaging (HQTI), which exploits temperature dependent photoluminescence (PL) emission of quantum rods to obtain the surface temperature map of a biased electronic device, with a straight-forward calibration. This method uses relatively simple, low cost equipment, while achieving sub-micron spatial resolution. This technique is demonstrated by measuring the thermal map of a direct current (DC) operated Gallium Nitride (GaN) high electron mobility transistor (HEMT), achieving an average temperature precision of 4oC, and a 680±20 nm measured lateral optical resolution. The technique was benchmarked against the standard infrared (IR) thermography and it was shown that IR underestimated device thermal resistance by 3 times for the device under test. HQTI is a versatile method for both measurement in sub-micron scale regions of interest and of larger areas in the hundreds of micrometres range. The technique is further extended to time resolved measurements, (T-HQTI), to be able to characterise thermal dynamics of a pulsed operated device. An average time resolution of 20 µs was achieved with the box-car averaging approach. T-HQTI measurements were also verified with sub-micron resolution transient thermoreflectance thermometry (TTR) and a good agreement was found for the 100s of MHz operating regime, which is the typical switching rate for power devices.
Multi-finger enhancement mode GaN-on-Si power devices, which are of concern for the cost-competitive power semiconductors industry, were also thermally assessed at the wafer level, using a combination of thermal measurements and finite element thermal simulations. Identifying thermal bottlenecks of the GaN power devices is critical in order to provide the most cost-effective cooling solution as these devices operate at high powers and any development is limited by the cost constraints. We identified the substrate as the main thermal bottleneck while buffer layer (along with the strain relief layer) possesses a negligible thermal resistance for these large area power devices. It was suggested that thinning the substrate by 7 times could reduce the junction temperature by down to 70% at DC operation, supported by calibrated finite element simulations.
The developments carried out and the findings of this work are expected to help achieving the maximum benefits of GaN technology. The impact of the new thermography technique is even expected to be wider as it can be adopted to, for example, biomedical applications or composite materials, where thermal dynamics at the sub-micron scale are of interest.
|Date of Award||30 Jul 2020|
|Supervisor||Martin H H Kuball (Supervisor)|