The Efficient Design of Time-to-Digital Converters

Abstract

Time-to-Digital Converters (TDCs) perform the conversion (sampling and quantisation) of time periods into digital (binary) numbers and are vital for Time-of-Flight (ToF) systems such as RADAR, LiDAR, SONAR and Ultrasonics. They are also vital in frequency-locking applications such as All-Digital Phase-Locked Loops (ADPLLs) and Delay-Locked Loops (DLLs), quantum applications such as Quantum Key Distribution (QKD), Single-Photon LiDAR / Single- Photon Time-of-Flight (SPToF) and coincidence counting.

The literature on TDCs is fragmented, with research clustering around specific applications and little cross-pollination of ideas between them. Therefore, I reviewed all these areas for novel TDC architectures and found several new designs including algorithmic, successive approximation and wave union TDCs. Most designs were based on Application Specific Integrated Circuits (ASICs) due to the hardware flexibility, with the rest on Field Programmable Gate Arrays (FPGAs), all of which have been verified.

One of the most promising hardware architectures for TDCs are FPGAs as they are of a lower cost than ASICs. I have presented the first TDC implementation on the FPGA’s DSP blocks and resolved the extreme non-linearity in the DSP blocks with multisampling techniques to produce an effective delay line with performance comparable to carry chains (13.60 ps single-shot precision). DSP delay lines avoid the use of general-purpose fabric, allowing larger quantities of channels or more applications to be integrated on to a single device.

The long bubbles caused by applying the wave union multisampling technique were unable to be corrected by existing bubble correctors. Therefore, a new hardware bubble corrector, which operates at line rate with zero dead time (130 MHz, 144 bits/cycle on my TDCs), was designed and tested.

Date of Award	2 Dec 2021
Original language	English
Awarding Institution	University of Bristol
Sponsors	EPSRC RCUK
Supervisor	Naim Dahnoun (Supervisor) & John G Rarity (Supervisor)